increment casted void pointer -- ANSI?

Blair P. Houghton bhoughto at nevin.intel.com
Thu Apr 4 15:18:18 AEST 1991


In article <15675 at smoke.brl.mil> gwyn at smoke.brl.mil (Doug Gwyn) writes:
>environments.  (While we were able to imagine an environment where
>floating and integral types were maintained in separate address
>spaces, I don't know of any actual implementations like that.)

Is it okay to propose one?

Someone over in comp.<mumble> (I think comp.unix.internals>
mentioned that the i860(tm) has one set of registers for
integers and one for floating-point.  (In fact, any
architecture involving separate CPU and FPU would be that
way, but the i860(tm) does them both on the same chip,
bringing up issues of further transparency by eliminating
the need for external memory or bus operations to implement
a FPU-to-CPU (floating to int) transfer.)

If for some reason the compiler decided that the union should
be handled entirely in register space, the ints and floats
would indeed have different locations.

				--Blair
				  "Yeah, I could beat up Mike Tyson."



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