Hardware freaks Unite (on this one)

Mariusz Stanczak Mariusz at fbits.ttank.com
Sun Apr 21 13:01:29 AEST 1991

In article <6464 at acorn.co.uk>, agodwin at acorn.co.uk (Adrian Godwin) writes:
> They may assume things about the bus timing - the critical timings on one
> Control registers may - or may not - be similar.
> The higher 680x0 processors
> have a different interrupt/exception stack frame to the 68000, and the 
> system needs also to recognise memory that isn't in it's normal addressing 
> range. A different mechanism is used to load the PSR.
> -- 
> --------------------------------------------------------------------------
> Adrian Godwin                                        (agodwin at acorn.co.uk)

Thank you for your comments, Adrian.  For those reasons, especially
the stack frame differences... that affects everything(!) a drop-in uP
upgrade doesn't sound like a viable route to go, though I'd love to be
proven otherwise.  A cache would be a much less obtrusive way to boost
a little the, already adequate, performance of this machine, with full
compatibility assured.  ...it'd be cheaper too ;-) (well maybe not, 25ns
memory still isn't a commodity item, but SIMPLER it would be for sure!)

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