3B1 External Monitor Project Status (20-May-1991)

[thad at btr.btr.com]

Pardon this indirect reply, but I'm attempting to catch up with some 5,000+
newsgroup postings from the past 6 weeks.

>From my quickly-scrawled notes, someone during the past several days asked if
there's any update to my "3B1 External Monitor" project.  Yes, there is.

I finally have it working with no "lost pixels" at the left margin, and, when
the circuit is "warmed up", it works well, but not well enough to inflict on
the 3B1 community just yet.

"``Warm up''?  Gee, Thad, you using tubes or, har de har har har, relays?"  :-)

No, no tubes or relays, just a kludged-up circuit adapted from some pulse
shapers in Don Lancaster's "TTL Cookbook."  Here's a quick refresher for those
new on the 3B1 scene, a description of what I've done and the extant problems,
and some thoughts on how I plan to proceed.  Your comments are invited.

Back in January (1991) I put together a tower-cased 3B1 with DB-9 jacks on the
back for the video output signals and the keyboard, bought a 14" flat-screen
paper-white monitor conforming to "PC" Hercules graphics (720x350 vs. the 3B1's
720x348), and demo'd it at the AT&T Silicon Valley UNIX Users' Group meeting.

The external video cable is standard as would be used with an IBM PC, and I
found 10' cables with a Berg connector on one end (and a DB-9 at the other end)
that plug right into the 3B1's keyboard (the cable and connector are even color
matched to the standard 3B1 cables for those who care about aesthetics).

At that time, there were video glitches on the topmost several scan lines, and
a constant loss of about 4 or 5 pixels at the left margin (for example, the
letter "k" at the left margin would appear as ":" (just the ends of the arms
would display)).

Ignoring the +12VDC, there are just 4 video points-of-interest exiting the 3B1
at the connector on the motherboard:

	vertical sync
	horizontal sync
	"real" video signal
	ground returns for the above

Use of one 7404 TTL inverting gate on the vertical sync fixed the glitch with
the topmost several scan lines, leaving only the problem with the leftmost
missing pixels to be solved.

Now, as mentioned before, I'm not a "video person", so if I use the wrong terms
(below), I'd appreciate a correction.  The only video references I have at hand
are Don Lancaster's "Cheap Video Cookbook" and "Son of Cheap Video", and the
programming reference manual for DEC's VT100 terminals (ref: descriptions and
diagrams of the video IN/OUT on the VT100's BNC jacks (which, by the way, were
adequate to cobble-up a sync-separator to display the VT100's video on a wide
variety of other monitors, and even to record VT100 video onto a home VCR)).

Using a dual-trace 50 MHz 'scope, one aspect of the 3B1's video seemed greatly
at odds with all the material I read in the above references: no "front porch"
or "back porch" of any consequence were evident.  The onset of the 3B1's "real"
video was exactly coincident with the falling edge of the horizontal sync with
no delay discernible to me even at 10nS/cm on the 'scope ("nS" = nano Seconds,
1E-9).

For reference, to assure we're all talking about the same things, here's my
diagram illustrating video signals as I understand them, both standard and 3B1:

	    STANDARD (RS170-like)		   3B1 (Hercules-like)

	    |                  |		    |             |
	    |<--- H BLANK ---->|		    |<- H BLANK ->|
	    |                  |		    |             |
	____                    ____		____               ____
	 ||||                  ||||		 ||||             ||||
VIDEO    ||||                  ||||		 ||||             ||||
	 ||||__________________||||		 ||||_____________||||

	    |  |	    |  |		    ||            |
	  ->|FP|<-	  ->|BP|<-		FP->||<-          | no BP
	    |  |	    |  |		    ||            |
	_______              _______		      ____________
	       |            |			     |            |
H.SYNC         |            |			     |            |
	       |____________|			_____|            |_____

	       |            |			     |            |
	       |<- H.SYNC ->|			     |<- H.SYNC ->|
	       |            |			     |            |


where:	H BLANK = horizontal blanking interval
	FP      = Front Porch (note the 3B1's extremely short interval)
	BP      = Back Porch (note the lack thereof on the 3B1's signal)
	H.SYNC  = horizontal sync

A "typical" H.BLANK with RS170 is 12 uS (microSeconds), a typical front porch
is 1.54 uS, a typical H.SYNC is 4.71 uS, and a typical back porch is 5.75 uS.

In an attempt to delay the "real" video with respect to the horizontal sync to
create a "Back Porch", I used pairs of 7404 inverter gates (up to 8 pair in the
final experiment) with no improvements.  I was next going to use a delay line,
but haven't tried that yet though I do now have the delay lines (with taps for
up to 100nS; the line is a VALOR DL2984 in a 16-pin DIP package size for which
I don't yet have the pinouts; if you know what they are and can tell me, I'd be
appreciative).

What I did, instead, was attempt a different approach: shorten the horizontal
sync pulse so the falling edge occurs before the onset of the "real" 3B1 video
signal; for this, I adapted the circuitry for a half-monostable multivibrator
from page 181 of the (1976 edition) TTL Cookbook, and this reduced the width of
the horizontal sync pulse to 1/2 its former size.

Using the gates on a 7404, the missing pixels now appeared!  But another glitch
arose: a "signal dropout" of about 1 pixel width approx. 16 pixels in from the
left margin.  That dropout problem disappeared when I switched to using a 7416
open-collector inverter; now things "sort of worked".

Additional conditioning with a 7413 Schmitt-trigger circuit seems to help, but
it now requires about 3 minutes after powering up all of the 3B1, the monitor,
and the external circuitry, for everything to stabilize; prior to stabilizing,
the displayed video appears like a movie depiction of someone's nightmares, and
one misses the 3B1 boot-up screen and the other /etc/rc displays.

This is how things stood about 4 weeks ago, and due to time spent at work I
haven't done anymore on this project since then.

As I see it, due to the custom gate array in the 3B1, any fixes or cures have
to be "external" to the 3B1 (unless one has a real old 7300 with the discrete
component video daughter board).

The 14" monitor works perfectly on a Hercules-graphics IBM/PC-AT at my office,
so there's nothing wrong with the monitor (for which I did find the horizontal
width adjustment finally, thanks to someone else's post to this newsgroup: the
slug-tuned coil near the HV transformer; the other adjustments were made using
more-obvious potentiometers, but they, too, were unlabelled).

What I still plan to do is to 'scope the video signals exiting the IBM-PC/AT
and compare them to what's exiting the 3B1 and discover the differences.

I also plan to "play" with the delay lines ($3.00 for a tube of 21 makes for
inexpensive experimentation :-) on the 3B1's "real" video, and also attempt to
cobble-up a better circuit to "shape" and manipulate the horizontal sync pulse
to be around 90-95% of the original pulse's width instead of the present 50% to
generate a shorter "Back Porch"; it's my gut feeling the "new" horizontal sync
pulse is too short with respect to the horizontal blanking interval.

Another possibility may be to duplicate portions of the 3B1's video input board
(located in the monitor housing at its back) and adapt that; but schematics for
that board are not in the Reference Manual or other places I've looked.

If anyone has "done" video circuitry and can suggest other possible approaches
and/or solutions, I'd be happy to try them and credit you in the final posting
of the "3B1 External Monitor" project.

It's my intent to include 3B1 CheapDraw format schematics and other pertinent
assembly drawings in the posting; I've come up with a simple method to convert
"reasonable" data files produced using a real CAD program on another computer
to 3B1 CheapDraw version 2 format.  (For those of you new to the 3B1, the 3B1
CheapDraw is available free at uucp site osu-cis (aka cheops.cis.ohio-state.edu
on the Internet [IP 128.146.8.62])).

Thad Floryan [ thad at btr.com (OR) {decwrl, mips, fernwood}!btr!thad ]