Debunking a few myths about DRAMs

[Steve Sutphen]

Although I do not consider myself an expert in today's memory systems I
have noticed a few errors or misunderstandings in some recent postings
about add on memory for Suns.  I was hoping that someone more knowlegable
than I would have posted some information but since they have not I will
put in my $0.02 worth.

The worst myth that I have seen is the illusion that a Sun (or other
computer for that matter) will run faster or slower depending on the speed
of the memory chips (or SIMS -- which are just some chips mounted on a
small piece of printed circuit).  It simply is not true.  The memory/cpu
(and cache system if present) are essentially tuned to work together --
the CPU sends out a request for a word from memory and a combination of
delays and clocks are based on that request to tell the CPU when the data
is ready.  If one puts faster memory in a system than is required all that
happens is that the data sits on the data lines for a while before the CPU
takes it.  If one puts on memory that is slower than the delay time then
the data on the data lines may not be stable yet at the time the CPU
latches it.  Notice that I say `may'.  As it turns out much of the
circuitry internal to the DRAM is driven from the latched address and does
not know how fast it is supposed to get the data out -- it largely does it
as fast as it can (there is some handwaving here as I seem to recall that
there are several minor cycles in actually reading the charge from a
capacitor and trying to figure if it was a 1 or 0).  As far as I know -
DRAM manufacturers have a single wafer line for all the "speeds" of chips
(i.e. they always try to make the fastest chip in the series).  They then
test all the chips to see how fast they will actually work (this is over a
wide temprature, voltage, and loading range).  They are then sorted into
the appropriate categories.  Since the technology is always "at the edge"
for the fastest chips and therefor their yeilds are lower they command a
higher price.  Since there are some margins in both Sun's design (they may
spec a 100ns access time chip when all they really need is say 110ns) and
in the chips themselves (the Sun system may not run as hot as the spec
allows, and a 105ns chip would not pass the 100ns spec, but would work
within the 110ns that may be all that is needed) chips that should not
work (according to Sun) may in fact work (maybe somewhat unreliably
though). (Of course if you tried this on your toy personal computer - Macs
and PCs are both included - you may not know that there is a problem as
they don't have parity to even give you a hint.)

Now that I have hammered that to death there are some other things that
may be different between similar looking SIMS.  (I am getting into even
weaker ground here.)  At least with less dense DRAMS there were several
methods of defining and implementing "Page Mode" operation.  This is used
to do fast sequential loads to/from memory (like cache loading on the
4/110).  Like I say I am not sure if this is a problem with 1mb DRAMS or
not, but if it is one would have to be knowledgeable than your average
software hacker (i.e. find some supplier that will state that the chips
will work in the machine of your choice).

The final item that I have seen is size.  The 3/80 and the 4/60 don't
quite have the space above the SIMs for some of the larger (cheaper)
modules.  There seems to be at least three ways to cram 9 chips on a PC
board that I have seen.  One company uses conventional 18-pin DIPS (Dual
Inline PinS) mounted across the board (i.e. the pins are parallel to the
short side of the board).  This method makes the board a triffle to long
to fit under the daughter boards (like maybe 1mm -- I have actually fit it
but would not recommend doing this).  These are the cheapest SIMS I would
imagine as 1) they use the DIP version of the chip which was slightly less
expensive because of supply and demand -- it takes up more board area and
so computer manufacturers have largely stopped using them -- the die
packagers got caught with their pants down here, but likely made up for it
in profit).  The other way of mounting DIPs is in a 3x3 matrix with the
pins parallel to the long edge of the board.  This type seems to fit in
the new machines without any problem.  The final method of assembling SIMs
uses surface mount J-lead DRAM chips (there are smaller packages but I
think the price differential makes them uneconomic for this application).
These are the smallest and most expensive (because of the supply/demand
for smaller board area). I have seen Sun ship both of the latter two
styles.

Just for the heck of it I took a look at what kind of DRAMs were in two of
our systems.  In a SS-1 (nee Sun 4/60) Sun used Mitsubishi M5M41000AJ-10
chips (I would be suprised if the -10 didn't mean 100ns).  In a Sun 3/80
Sun used Fujitsu 81C1000-10PJ chips (once again 100ns?) and I have added
some SIMs (from either Parity or Helios, I have purchased from both) that
have (unknown logo, Korea assembled) K41C1000AP-10 parts on them that seem
to have worked just fine for the two weeks I have had them installed.
Your milage may vary.

Sorry this is so long, but maybe someone more knowledgable will
correct it and resubmit.

	steve sutphen
	steve at cs.ualberta.ca	or alberta!steve