Are there any SPARC machines with separate I and D caches?

[kendall at saber.com]

Our application writes machine instructions into its own data space, then
jumps to them.  On some machines (such as the DECstation 3100) there are
separate instruction and data caches, and you have to flush the latter
(and perhaps invalidate the former) over the range of locations you just
wrote, before jumping.  Any SPARC machines with this feature?  If so, how
do you flush the caches?

Please reply by mail.

Sam Kendall			       		       kendall at Saber.COM
Saber Software, Inc.			             uunet!saber!kendall
(617) 876-7636