Want info. on Raster-Op processor.

[Young Han]

If anyone could send me any infomation, such as logical level diagram, on
Raster-Op processor, I will REALLY appreciate it. I am trying to draw a
layout of the chip for my Intro. to VLSI design class project.  I've
looked into "Sun-3 Architecture:SUN Technical Report(Revised Aug.  86)"
and it had only a paragraph of infomation about it. I know I should be
searching around but as an undergraduate senior, I just don't have time
for it.

Your help  will be greately appreciated.

Young S. Han                          Pmail : 10 Landing Lane APT 1K
Prime Computer                                New Brunswick, NJ 08901
College of Engineering                Vmail : (908) 932-3418
Office: ENG-B124                      Email : yhan at caip.rutgers.edu