Mylex SCSI Controller, 16550A UARTS

Doug Pintar dougp at ico.ISC.COM
Sat Oct 7 01:49:14 AEST 1989

I am running a Compaq 386/20 with 300MB ESDI drive and WD-1007WA2 controller.
Under 386/ix 2.0.1, I've written a small program that just does writes from
a buffer to a file.  Using 121856-byte buffers for the RAW disk (7 tracks @
34 sectors/trk, largest number of physical tracks you can fit in a single
controller read request), I get WRITE rates of 828KB/sec.  Using 'dd' from
the RAW disk to /dev/null with the same size buffers I get READ rates of
810KB/sec.  Using 1KB buffers to write to a file in the filesystem, I get
WRITE rates of between 262KB/sec and 338KB/sec, depending on fragmentation
of the free blocks (this is for an 8MB file).  Using 'dd' from a file to
/dev/null with 1KB buffers, I get READ rates of 368KB/sec to 413KB/sec, again
depending on fragmentation.  I've got a lot of memory, so I'm using 1500
filesystem buffers (NBUF in configuration) and 512 hash slots for those
buffers (NHBUF in configuration).  NOTE: The WD-1007WA2 is an interrupt-per-
sector, PROGRAMMED I/O device.

Using an Adaptec 2320 ESDI controller on the same machine, I get slightly
higher rates.  The 2320 has no track read-ahead cache, but it is faster at
getting commands started.  The cache is pretty meaningless on large transfers,
and even through the filesystem, 386/ix tries to move a track or two at a
time.  I once tried reading and writing to BOTH controllers simultaneously,
(RAW devices, big buffers) and got aggregate throughput of around 1.2MB/sec.
At this point, the CPU gets swamped transferring data and processing

Roy Neese at Adaptec once claimed multi-drive aggregate throughput for an
AHA-1542 SCSI Adapter of 2.2MB/sec.  Since this device uses first-party
DMA and imposes very little host overhead, I'd believe it.  I've never had
the opportunity to use it with multiple, fast drives, but I see no reason
that the 386/ix driver for the board should hold it up.

The real problem with disk transfer on AT-bus (and MCA as well, for that
crowd) is NOT bus bandwidth but lousy controller design.  PIO controllers
are cycle hogs, and most DMA controllers DON'T SUPPORT SCATTER/GATHER!  This
makes transfers to/from physically-discontiguous memory pages very inefficient.
To my knowledge, ONLY the Adaptec 1542 (and its MCA equivalent) supports
scatter/gather (up to 16 addresses and counts can be passed).  Performance
of the 386/ix HPDD for that adapter MORE THAN TRIPLED when I enabled code
to utilize this capability.

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