Jargon file v2.1.5 28 NOV 1990 -- part 5 of 6

[Zap Savage]

In article <1990Dec5.144445.18632 at abcfd20.larc.nasa.gov> jcburt at ipsun.larc.nasa.gov (John Burton) writes:
%True, a typical 386 machine has good I/O bandwidth, but bandwidth isn't
%everything. The majority of 386 machines have an ISA bus which is a 
%very simple bus controlled by the cpu. When performing I/O, the
%cpu blocks itself and  turns control of the bus to the I/O device.
%When the I/O operation is complete, control returns to the cpu, which
%unblocks itself.
%...
%Machines that were originally designed as a multi-user platform usually
%where set up so that the I/O could be performed without the direct control
%(or blocking) of the cpu. The system bus was designed so that multiple
%operations could occur more or less independent of the cpu (multi-tasking
%hardware design). The typical 386 machine is designed as a single tasking
%machine (regardless of what the cpu can do, the bus & support hardware
%was designed for single tasking). 

Significant bottlenecks in multiuser micros should be disk and serial ports,
right?  Anyone know how much system loading Arnet Smartports create?  I know
they have their own 80286 onboard that does all of the work; the main processor
just sends and receives over the bus to the 286 and continues on its merry way.
Do Arnet Smartports also cause the CPU to block the bus and sleep?

How about disk or network controllers?  Are there any out there that are smart
boards that don't cause the system to block?

Zap