Make doesn't understand .SUFFIXES: .b .c .s .i .o

[Martin Weitzel]

In article <23182 at shlump.lkg.dec.com> jc at netrix.nac.dec.com writes:
[about a problem he has with make's suffix rules]

Chris Torek already posted one perfectly valid solution to this
problem (adding a `.b.o:' rule).

But as often, there are several possible solutions, and though I'd
probably too solve it as Chris recommended, I'll point to an alternative.

>What I've been doing is adding lines to the makefile like:
> foo.c:  foo.b
>and then it works fine.  But this seems stupid; every time I add a new
>source module, I have to add a line like this.

You can save a little typing if you do this as follows:

	C_B = $(@:.c=.b) # never change this macro

	# add new modules to the LHS of the following dependency
	foo1.c foo2.c ... fooN.c : $$(C_B)

This may not seem to be big win as long as you type it as shown above, but
if it is changed it a little,

	C_B = $(@:.c=.b) # never change this macro

	# add new modules here
	B_SOURCES = foo1.b foo2.b ... fooN.b

	# never change this dependency
	$(B_SOURCES:.b=.c) : $$(C_B)

there is the advantage that all the *.b modules are now listed in the
make macro B_SOURCES. If this is a win or not largely depends whether
there is the necessity for B_SOURCES anywhere else in the Makefile
(e.g. if there is any other general processing of *.b modules you
sometimes want, say a special pretty printer, a special lint or
whatever). Note also that it can be sometimes an advantage to put
things into a make macro since there are several ways to set macros
when you run make (i.e. without changing the makefile).

(As I posted some of the backgrounds how this works not so long ago,
I'll not repeat it here. If anybody has a questions, please contact
me by mail.)
-- 
Martin Weitzel, email: martin at mwtech.UUCP, voice: 49-(0)6151-6 56 83