RTS/CTS Protocol for UNIX 4.0

utzoo!decvax!duke!chico!harpo!npois!houxi!ihnss!ihps3!stolaf!sft utzoo!decvax!duke!chico!harpo!npois!houxi!ihnss!ihps3!stolaf!sft
Sat Feb 20 02:19:32 AEST 1982


Actually, this applies to anyone trying to implement RTS/CTS on just about
anything...

Watch out for double-buffered transmitters.  Just about every UART chip on
the market today is double buffered.  This includes the chips used in all
of the DEC serial interfaces (DL, DH, DZ, etc.).

Double-buffered transmitters have two registers.  One is the output shift
register that holds the character that the chip is currently sending.  The
other holds the next character to be sent.  When the chip finishes sending
a character, it copies the holding register into the output register and
signals "ready".  You now have a full character time to put the next
character into the output register.  So far, so good.

Unfortunately, some devices that use RTS/CTS or DTR/DSR (or MIDGE/FOOP for
that matter) are very particular about timing.  When they signal BUSY,
they want transmission to stop after the current character.  BUT there's
already a character in the holding register and no way to stop it from being
sent.

We got burned on an Epson printer that way.  (See rave on Epsons in
info-cpm.)

The moral: check that RTS/CTS will help you first.  You might be able to
get things running in tough situations by enforcing a one-character-at-
a-time rule in the driver, but it'll be a lot tougher.

--For the original question, I b'leve there was a V7 driver supporting
such protocols (subject to above limitations) on one of the distro tapes.
I suspect that you could pull the necessary mods for the VAX driver
out of that.

Steve Tarr
ihnss!ihps3!stolaf!sft



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