Novice question.

Kaleb Keithley kaleb at thyme.jpl.nasa.gov
Thu Nov 15 05:41:44 AEST 1990


In article <11476 at j.cc.purdue.edu> zhou at brazil.psych.purdue.edu (Albert Zhou) writes:
>
>How many people can envision a microcomputer with thousands of big CPU, each
>having thousands of registers?

Yeah, it's called memory; but it's not as efficient as having the registers
in the CPU.  Or you could put a 128k fast static column RAM cache, that'd
give you 32768 general purpose registers if you want to go to the trouble
of trying to defeat the cache controller.

Let's see, according to the Intel 486 Reference, the 486 has sixteen 
registers; eight general purpose (EAX, EBX, ECX, EDX, EBP, ESP, ESI, EDI)
six segment registers (CS, SS, DS, ES, FS, GS), and two status and control
registers (EFLAGS, EIP.)  It also has eight floating point registers
R0..R7) and three FPU status and control registers.  We'll ignore the
"error pointers" for this discussion.  The reference also states the 
the 486 has 1,000,000 transisters; with 27 registers, that's over 37,000 
transistors per register.  No flames about transistor count on alternative 
architectures please, I know, for instance, that sparc has about 18,000
transistors with something like 16 general purpose registers; don't
forget to add the transistors in the FPU.

So, 1000 registers * 37,000 transistors per register = 37,000,000 transistors.
Any solder sniffers out there want to debug a 37,000,000 transister CPU. :-)

1000 registers, and to think I used to work on a 6502, with only three
8-bit registers, and two of them were index registers.  I thought I was in 
heaven when I got six on the 8086/8088.

Not sure what any of this has to do with comp.lang.c.  Thanks for listening.

-- 
Kaleb Keithley                      Jet Propulsion Labs
kaleb at thyme.jpl.nasa.gov

I don't watch Twin Peaks; I just come to work.



More information about the Comp.lang.c mailing list